Path: utzoo!dciem!nrcaer!scs!spl1!laidbak!att!pacbell!ames!ncar!noao!mcdsun!nud!tom
From: tom@nud.UUCP (Tom Armistead)
Newsgroups: comp.arch
Subject: Re: 88k register sets?
Message-ID: <804@nud.UUCP>
Date: 1 Jun 88 23:37:32 GMT
Article-I.D.: nud.804
References: <631@necis.UUCP>
Reply-To: tom@nud.UUCP (Tom Armistead)
Distribution: na
Organization: Motorola Microcomputer Division, Tempe, Az.
Lines: 14

In article <631@necis.UUCP> smv@necis.UUCP (Steve Valentine) writes:
>This is the only mention I have seen of the 88k having multiple register sets.
>Is this really true?  If so, which registers are duplicated, and how many sets

    No, its not true.   The only other "register set" that the 88100 has is
the supervisor storage registers (cr17-cr20).  These are merely read/write
registers that can be used to quickly save away up to 4 of the general purpose
registers (e.g. to guarantee low latency for real time interrupt handling).
This is not register windowing which the article seemed to be eluding to.

-- 
Just a few more bits in the stream.

The Sneek