Path: utzoo!attcan!uunet!lll-winken!lll-tis!helios.ee.lbl.gov!pasteur!ames!ncar!oddjob!kaon!nucsrl!gore
From: gore@eecs.nwu.edu (Jacob Gore)
Newsgroups: comp.sys.amiga
Subject: Re: RISC 68K? (Was Re: Byte is rubbish - the Archimedes sure ain't !)
Message-ID: <10260013@eecs.nwu.edu>
Date: 9 Jun 88 18:16:05 GMT
References: <489@nmtsun.nmt.edu>
Organization: Northwestern U, Evanston IL, USA
Lines: 9

/ comp.sys.amiga / daveh@cbmvax.UUCP (Dave Haynie) / Jun  8, 1988 /

>There is a RISCy CPU set ... it claims to be fully object code compatible 
>with the 68000.

Me confused...  How can you have a RISC CPU that is object-compatible
with a CISC CPU?

Jacob Gore				Gore@EECS.NWU.Edu
Northwestern Univ., EECS Dept.		{oddjob,gargoyle,ihnp4}!nucsrl!gore