Path: utzoo!attcan!uunet!portal!cup.portal.com!chrisj From: chrisj@cup.portal.com Newsgroups: comp.sys.m68k Subject: Re: opcode emulation (Was: Re: 68020 in a *68010* socket?) Message-ID: <6443@cup.portal.com> Date: 12 Jun 88 07:30:55 GMT References: <17206@gatech.edu> <10123@mcdchg.UUCP> <17479@glacier.STANFORD. Organization: The Portal System (TM) Lines: 67 XPortal-User-Id: 1.1001.2041 In Message-ID: <182@elgar.UUCP>, ford@elgar.UUCP (Mike "Ford" Ditto) writes: >Speaking of 68020/881 emulation, has anyone ever implemented a >complete 68020-instruction emulation on the 68010? The reason I ask >is that I encountered a surprising inconsistency in the handling of >illegal opcodes on the 68010. [a paragraph about stuff that worked ok deleted] >What doesn't seem right is what happened for an instruction that used >the new scaled index 68020 addressing mode. The opcode looks almost >the same, except where there were required zeroes on the 68010, the >68020 has two bits to specify a scale amount for the index register. >When I ran this opcode (with a scale value of 4, incompatible with the >68010) on the 68010, the result was a *bus error*. As indicated in appendix D, pp D-6,D-7 of the 68020 User's Manual, all members of the 68000 family fully decode the opcode word, and generate an illegal opcode exception when appropriate. However, earlier members of the family DO NOT necessarily validate the contents of unused fields in extension words, especially those required for indexed addressing. You will not necessarily get stopped if "should-be-zero" bits aren't: instead they may be treated as zeroes. The opcode IS legal, it's the extension word which is bad. For example, suppose that the compiler generated ADD.L disp16(A6,D7.L*4),D6 for the 68020. The index word will be D/A RRR W/L Scale brief/full BS IS BDSize 0 I/IS 0 111 1 10 1 0 0 10 0 000 The 68010 will ignore the scale and brief/full bits, treat the right 8 bits as a displacement of 32 (decimal), and use the index register contents without scaling. Assuming that A6 contains an even address, there are two cases, depending on whether D7 is even or odd. If it is even, you will fetch the wrong word, add it to D6, and then the 68010 will treat the displacement word as the opcode of the next instruction. Depending on exactly what the displacement happens to be, anything can happen (including an illegal opcode trap). If D7 is odd, then the source address will also be odd, so the instruction will trap out with an address error, and the processor will never get to misinterpret that displacement word as an opcode. For other 68020-030 addressing modes which look like plain indexed modes to the 68010, even stranger things may happen. For example, with some of the memory-indirect modes, the rightmost 8 bits of the extension word may look to the 68010 like an odd displacement. The bottom line is that the 68K product line IS generally UPWARD compatible (except for the MOVE SR,xxx vs MOVE CCR,xxx mistake and the differences in the formats of exception frames), but is downward compatible ONLY w.r.t. opcode words, NOT extension words. That means that there is NO guarantee that you can simulate 68020 execution on a 68010; in the general case you cannot do so. There are good reasons why the 68020 manual suggests that a program which contains 68020-only object code start with the trap-if-false instruction, which is a no-op to the 68020 but illegal on the earlier members of the family. It can save you some time trying to debug a problem if you mistakenly run a 68020 program on a 680xx for xx < 20. And of course, a word or long reference on an odd address is legal on the 68020, but illegal on the 68010: if you wanted to simulate a 68020 on a 68010, you'd have to simulate every odd word or long reference. Since you cannot do the emulation anyway, I guess that doesn't matter. Christopher Jewell chrisj@cup.portal.com sun!cup.portal.com!chrisj "In the country of the blind, the one-eyed man is, as we all know, king. And across the way, in the country of the witless, the half-wit is king." _The_Graves_of_Academe_ by Richard Mitchell