Path: utzoo!attcan!uunet!husc6!mailrus!iuvax!pur-ee!uiucdcs!uxc.cso.uiuc.edu!urbsdc!aglew
From: aglew@urbsdc.Urbana.Gould.COM
Newsgroups: comp.arch
Subject: Re: Details on Moto 88200 CMMU
Message-ID: <28200160@urbsdc>
Date: 14 Jun 88 14:29:00 GMT
References: <6396@cup.portal.com>
Lines: 16
Nf-ID: #R:cup.portal.com:6396:urbsdc:28200160:000:827
Nf-From: urbsdc.Urbana.Gould.COM!aglew    Jun 14 09:29:00 1988


>	"Note that adding Cmmus increases the size of the PATC and BATC
>	as well as the data/instruction cache."
>
>Adding CMMUs creates some interesting problems.  With more than one
>CMMU on a memory port (instruction or data), you pretty much have to
>use part of the memory address as a chip selector.  (We use A12 and A13
>to select one of four CMMUs.)  But this memory address is *virtual*, so
>suddenly we have a (somewhat) virtual cache with aliasing problems.
>For example, if physical page 12 is mapped to virtual page 16, it is
>serviced by CMMU0; if the kernel remaps it to virtual page 17, it is
>serviced by CMMU1.  The aliasing problems can be solved by snooping all
>of memory, but this is prohibitively expensive.  The kernel can flush a

Couldn't you use part of the address that is untranslated to do
the select?