Path: utzoo!attcan!uunet!lll-winken!lll-tis!helios.ee.lbl.gov!pasteur!ucbvax!decwrl!hplabs!hpda!hpcuhb!hpcllla!hpclisp!hpcldko!daryl From: daryl@hpcldko.HP.COM (Daryl Odnert) Newsgroups: comp.arch Subject: Re: Branch Delay Annullment Message-ID: <650002@hpcldko.HP.COM> Date: 15 Jun 88 21:27:03 GMT References: <22065@amdcad.AMD.COM> Organization: HP NSG/ISD Computer Language Lab Lines: 22 The Hewlett Packard Precision Architecture uses the following approach: When a branch instruction is executed, the delay slot instruction executed before control flow is transferred to the branch target. A bit is provided in each branch instruction, however, that can cause the nullification of the delay slot instruction. Exactly what happens depends on the direction of the branch and whether or not it is a conditional branch. When nullification is selected in a branch instruction... Branch type Branch direction Branch taken? Is the delay slot instruction executed? conditional forward yes no conditional forward no yes conditional backward yes yes conditional backward no no unconditional forward always no unconditional backward always no Daryl Odnert HP Computer Language Lab hplabs!hpcllcm!daryl