Path: utzoo!attcan!uunet!husc6!bloom-beacon!tut.cis.ohio-state.edu!cs.utexas.edu!ut-sally!nather
From: nather@ut-sally.UUCP (Ed Nather)
Newsgroups: comp.arch
Subject: Re: m88000 benchmarks (and C vs ASM)
Summary: Ah ha!
Keywords: FFT, m88000, benchmark, VLSI System Design
Message-ID: <12112@ut-sally.UUCP>
Date: 17 Jun 88 14:57:02 GMT
References: <1941@pt.cs.cmu.edu> <3208@ubc-cs.UUCP>
Organization: U. Texas CS Dept., Austin, Texas
Lines: 29

In article <3208@ubc-cs.UUCP>, pajari@grads.cs.ubc.ca (George Pajari) writes:
> 
> When pressed at a local presentation on the M88000, Motorola reps conceded
> that the 'infamous' FFT benchmark represented carefuly crafted HAND-CODED
> RISC instructions ordered to take maximal advantage of the pipelining in
> the 88100.  Furthermore, they admitted that the best code by any compiler
> resulted in a 54 cycle loop...ALMOST TWICE THE LENGTH OF THE BENCHMARK CODE.
> 

Gosh!  Does this mean that careful hand-coding can yield a factor of 2
faster code even on a RISC machine?  I know it means that on a CISC machine
because I've done better than that myself. (Current record: a factor of 22
on a Nova computer, me vs. Fortran, with the sieve benchmark).

But where does this leave all the CS statements that assembly-language
coding is no longer needed?  Are factors of 2 really unimportant?
As I understand it, one of the major arguments for RISC architecture is
that "...only those instructions that a compiler can easily generate are
included in the instruction set."  So the compiler-builders stack the
deck and still fall a factor of 2 short.

Before you reach for the "r" key to send flames, be aware that I am guilty
of once writing a compiler, long ago.  But I wrote in in ASM.

-- 
Ed Nather
Astronomy Dept, U of Texas @ Austin
{allegra,ihnp4}!{noao,ut-sally}!utastro!nather
nather@astro.AS.UTEXAS.EDU