Path: utzoo!attcan!uunet!munnari!basser!steve
From: steve@basser.oz (Stephen Russell)
Newsgroups: comp.arch
Subject: Re: The VAX Always Uses Fewer Instructions
Keywords: VAX MIPS
Message-ID: <1277@basser.oz>
Date: 20 Jun 88 03:34:10 GMT
References: <6921@cit-vax.Caltech.Edu> <28200161@urbsdc> <10595@sol.ARPA> <11981@mimsy.UUCP> <914@entropy.ms.washington.edu> <8717@lll-winken.llnl.gov>
Reply-To: steve@basser.oz (Stephen Russell)
Organization: Dept of Comp Sci, Uni of Sydney, Australia
Lines: 24

>In article <914@entropy.ms.washington.edu> mcglk@scott.biostat.washington.edu writes:
>I still haven't seen any good arguments as to why RISC is so much better or
>faster.

Two quick reasons:

1. CISC costs silicon. Using up silicon in implementing complex instructions
leaves less for performance enhancements, like large register sets, on-board
caching, hardware assistance (barrel shifters, hardware multipliers, etc),
translation lookaside buffers, etc.

2. CISC costs performance. Lots of addressing modes, for example, result
in many pipeline blocks while additional addressing values are fetched
from cache/memory. The whole CPU stops because of some extra indirection.
Also, this stop/start behaviour must be planned for, and this costs more
silicon - see 1 above. Keeping things simple allows the system to do something
useful (or lots of useful things in parallel in the pipeline) for _every_
cycle.

>I'm kind of fond of the VAX instruction set, and you can do a heck
>of a lot more with one line of its instruction set than you can with five
>or ten lines of RISC code.

But is the single VAX instruction actually faster, all else being equal?