Path: utzoo!attcan!uunet!ccicpg!allen
From: allen@ccicpg.UUCP (Allen Brumm)
Newsgroups: comp.sys.m68k
Subject: Re: opcode emulation (Was: Re: 68020 in a *68010* socket?)
Message-ID: <51@ccicpg.UUCP>
Date: 15 Jun 88 21:47:14 GMT
References: <17206@gatech.edu> <10123@mcdchg.UUCP> <17479@glacier.STANFORD.EDU> <6276@cup.portal.com> <17482@glacier.STANFORD.EDU> <182@elgar.UUCP>
Reply-To: allen@ccicpg.UUCP (Allen Brumm)
Organization: CCI CPG, Irvine CA
Lines: 40

In article <182@elgar.UUCP> ford@kenobi.UUCP (Mike "Ford" Ditto) writes:
>What doesn't seem right is what happened for an instruction that used
>the new scaled index 68020 addressing mode.  The opcode looks almost
>the same, except where there were required zeroes on the 68010, the
>68020 has two bits to specify a scale amount for the index register.
>When I ran this opcode (with a scale value of 4, incompatible with the
>68010) on the 68010, the result was a *bus error*.
>
>Now, all I know is that Unix sent the process a SIGBUS (bus error), so
>I don't know for sure what the 68010 exception number was.  But I
>don't think Unix would have any reason to turn an illegal instruction
>exception into a SIGBUS.  Is it possible that the 010 gives a bus
>error for some illegal opcodes?  I do remember reading in the 68000
>spec that ALL unimplemented opcodes are supposed to give an illegal
>instruction exception or an emulator trap exception.
>
>Does anyone know whether the 68010 is consistent in reporting illegal
>instructions?  If not, it would seem difficult to emulate the 020
>instruction set (having to check bus errors for illegal addressing
>modes would be pretty bogus).
>

I suggest that anyone attempting to emulate 68020 opcodes on a 68010 or
lesser processor carefully read Appendix D of "MC68020 32-Bit Microprocessor
User's Manual", Second Edition.  In particular, Section D.3 Extension Words.

All 680x0 processors fully decode all 65,536 operation words, so if an
opcode for a newer member of the 680x0 family is executed on an earlier
processor it will be "trapped out."  Only the first word of an instruction
is checked for legality by the processor, any extension words of the
instruction are NOT checked.

I would suspect that you are getting a legitimate bus error due to an
address calculation gone astray from the use of an extension word.

In summary, you can emulate the new opcodes, but you can't always emulate
new addressing modes since you are not notified of there use.  However,
you could probably write an object code translator to do it for you!

Allen Brumm	ccicpg!allen