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From: aglew@urbsdc.UUCP
Newsgroups: comp.arch
Subject: Re: Superoptimiser.
Message-ID: <28200172@urbsdc>
Date: 30 Jun 88 20:28:00 GMT
Lines: 12
Nf-ID: #R:<91odrecXKL1010YEOek@amdahl.uts.:-43:urbsdc:28200172:000:517
Nf-From: urbsdc.Urbana.Gould.COM!aglew    Jun 30 15:28:00 1988


> >Branches tend to be deadly to fast machines. Delay slots or no, it can still
> >give the cache/instruction stack indigestion.
>
>Gosh!  You guys aren't thinking big enough.  How about multiple
>parallel pipelines to compute all the various instruction threads
>in parallel and just keep the results of the one that is actually
>taken?  Takes Big Bucks?  Sure.  But when you're using gallium
>arsenide, who cares?

The IBM 360 model 97 (I always get the model number wrong;
anyway, one of the early 360s) did this.