Path: utzoo!attcan!uunet!husc6!mit-eddie!mit-vax!sharma
From: sharma@mit-vax.LCS.MIT.EDU (Madhumitra Sharma)
Newsgroups: comp.arch
Subject: Re: Cray & Amdahl (Really: VM on vector processors) (Was: ...)
Keywords: Cray, Virtual Memory
Message-ID: <4475@mit-vax.LCS.MIT.EDU>
Date: 22 Jul 88 17:22:16 GMT
References: <4232@cbmvax.UUCP> <76700035@p.cs.uiuc.edu> <9a0K/cbluk1010IHSPc@amdahl.uts.amdahl.com> <228@sdeggo.UUCP> <5342@june.cs.washington.edu> <7588@boring.cwi.nl>
Reply-To: sharma@mit-vax.UUCP (Madhumitra Sharma)
Organization: MIT Laboratory for Computer Science, Cambridge
Lines: 12


	The hardware complexity also goes up if the vector pipeline is to
be able to take interrupts in the middle of a vector instruction. This
increased complexity (most probably) implies a longer cycle time for the
machine, too. Cray wanted to make his pipelines as simple as possible so 
that he could run them as fast as possible. Therefore, he decided he would
not handle any interrupts in the middle of a vector instruction. Hence,
no virtual memory.


Madhu Sharma
sharma@xx.lcs.mit.edu