Path: utzoo!attcan!uunet!husc6!ukma!gatech!hubcap!mark
From: mark@hubcap.UUCP (Mark Smotherman)
Newsgroups: comp.arch
Subject: Re: Execute instructions
Summary: Bendix G20 and GE-600 discussion
Message-ID: <2316@hubcap.UUCP>
Date: 25 Jul 88 20:02:17 GMT
References: <787@amethyst.ma.arizona.edu> <4235@saturn.ucsc.edu>
Distribution: na
Organization: Clemson University, Clemson, SC
Lines: 47

In article <4235@saturn.ucsc.edu>, haynes@ucscc.UCSC.EDU (99700000) writes:
> 
> A number of machines have had the single execute instruction,
> including some that had a conditional execute.  So far as I know
> the XED is unique to the GE600 and its successors; in some sense
> it's an artifact of the machine implementation.  That is, the
> machine was implemented with 72-bit memory, so it always fetched
> instructions in pairs, so it had a 2-instruction buffer to hold
> them, so the XED could run out of that buffer.  (That was also
> why there was a repeat double instruction).  Or one could say it's
> a case where there isn't really an architecture because it is
> intertwined with the implementation.

I don't know about the XED instruction on other machines.

G.A. Blaauw and F.P. Brooks, *Computer Architecture*, list the Bendix G20
as having a repeat double.  Their analysis is that since the Bendix G20
is a single-address machine (as is the GE-600), it needs a repeat double
to carry enough addressing information to do something useful (e.g. inner
product, table search).  They do not indicate if the Bendix machine
fetched double words or not.

The double-word fetch would also explain why there are pairs of out-of-
line instructions executed for each interrupt on the GE-600.  (Typically,
one of these is equivalent to a call to an interrupt handler.)

> 
> I've always wondered who was (were) the architects on that machine.
> 

I believe Couleur was the principal architect of the GE-600.  The first
paper was Glaser, Couleur, and Oliver, "System design of a computer for
time sharing applications," AFIPS FJCC, 1965 (although the GE-625 was
introduced in 1964 and targeted at the 7090 market).

It was a very nice machine for its era, with rich addressing modes/
indirection scheme and a relocation register.  Interesting features
also included tallies for character manipulation and an interrupt
inhibit bit in every instruction.  In many ways, it is the ultimate
IAS-based architecture (i.e. single-address, AC-MQ registers).

I enjoyed working with a Honeywell (GE sold out in 1969) 6050 as an
undergraduate in the mid-70's.

-- 
Mark Smotherman, Comp. Sci. Dept., Clemson University, Clemson, SC 29634
INTERNET: mark@hubcap.clemson.edu    UUCP: gatech!hubcap!mark