Path: utzoo!utgpu!attcan!uunet!mcvax!enea!diab!pf
From: pf@diab.se (Per Fogelstr|m)
Newsgroups: comp.arch
Subject: Re: Sun 4 MIPS rating
Summary: SPARC instruction quality factor lowest of all ?
Message-ID: <408@ma.diab.se>
Date: 31 Jul 88 11:26:07 GMT
References: <941@srs.UUCP>
Reply-To: pf@ma.UUCP (Per Fogelstr|m)
Organization: Diab Data AB, Taby, Sweden
Lines: 20

In article <941@srs.UUCP> srs!matt@cs.rochester.edu (Matt Goheen) writes:
>I have always been led to believe that Sun's rating of the Sun 4/200
>series as 10 MIPS to be "Vax" MIPS (this goes for the 7 MIPS 4/110
>as well).  Well, it appears this this isn't the case.  ............ he
>states that the SPARC typically needs about 25% more instructions
>to complete a given task than a 68020 does. 

Recently ELECTRONICS had an article sereies on RISCS. One of the articles
compared different cpu's introducing something called "instruction quality
factor". In this comparision the VAX780 was rated 1.0 with its 0.47 MIPS
performence. The funny thing that puzzels me was that most RISC designs
had an "IQF" of 0.8 - 0.9 exept SPARC wich was rated 0.6. Assuming SPARC is
a native 10MIPS cpu this would yield a 6 normalized mips cpu. I did the same
comparition with my 32532 design. This 25Mhz prototype executes about 6-8
real MIPS (Yes there is a pin on the chip that pulses every time a new
instruction is starte where i connect the counter). Okay, the IQF for this
cpu must be very close to 1.0 since the architecture resembles the VAX
architecture.  In this case my 25Mhz 32532 design is a 15VAX MIPS processor.
Well then, MIPS what the heck is it, really. At least it's useless when
comparing different processor architectures.