Path: utzoo!utgpu!water!watmath!clyde!att!osu-cis!tut.cis.ohio-state.edu!mailrus!ames!elroy!cit-vax!tybalt.caltech.edu!stevel From: stevel@tybalt.caltech.edu (Steve Ludtke) Newsgroups: comp.sys.amiga.tech Subject: 23 pin video port Message-ID: <7476@cit-vax.Caltech.Edu> Date: 1 Aug 88 17:10:05 GMT Sender: news@cit-vax.Caltech.Edu Reply-To: stevel@tybalt.caltech.edu (Steve Ludtke) Organization: California Institute of Technology Lines: 19 Hi. I've been playing around with the XCLK outputs on the 23 pin video output, and there are a few things I can't find in the hardware manual. Supposedly, pin 1 (XCLK) will change state whenever the background color (color 0) is being displayed. The XCLKEN (pin 2) and GNDRTN (pin 13) are what I don't understand. XCLKEN is supposed to be an active low pin. I assumed it was an input, and brought it low. That caused the display to go blank, and I had to reset to get it back. Now I'm trying to figure out what exactly this pin is. Is it a sync pulse input for genlocking, an output indicating whether XCLK is enabled/disabled, or something else ? (by the way, I get a constant high output from XCLK, ie no low pulses for bkgnd color.) Any help would be greatly appreciated. Thanks. --------------------------------------------------------------------------- Steve Ludtke stevel@tybalt.caltech.edu ..!cit-vax!tybalt.caltech.edu!stevel stevel@citiago (Bitnet) OBS949 (Amer PPl lnk) 72335,1537 (Compuserve) XJM16487 (Genie)