Path: utzoo!utgpu!attcan!uunet!lll-winken!lll-tis!ames!mailrus!cornell!uw-beaver!uw-june!pardo
From: pardo@june.cs.washington.edu (David Keppel)
Newsgroups: comp.arch
Subject: Risky instructions (WAS: Re: RCA 1802 (was: PC history))
Keywords: history, pc, RCA, 1802
Message-ID: <5440@june.cs.washington.edu>
Date: 5 Aug 88 16:17:07 GMT
References: <5458@ecsvax.uncecs.edu> <1876@looking.UUCP> <753@applix.UUCP> <3884@sequent.UUCP> <719@mcrware.UUCP>
Reply-To: pardo@uw-june.UUCP (David Keppel)
Organization: U of Washington, Computer Science, Seattle
Lines: 30

>I respectfully differ.  The 6809 has a SEX instruction ("Sign EXtend",
It also has Branch on LOw  (BLO).

The TI 9900 is really kinky, it has the Branch and Load Workspace
Pointer (BLWP - Bullwhip) instruction.

All seriousness aside, if you ever get a chance to look at the
UMichigan list of opcodes (Circa 1970, since reprinted elsewhere) you
really should.  Favorites include:

RETM  # RETurn to Manufacturer
BROW  # BRanch On Wednesday
HACF  # Halt And Catch Fire

This last one (rumor has it) was actually implemented in a particular
IBM (if you ran the right program):

  + Temperature sensor is near the core memory.
  + Core memory must be written every time it is read.
  + Put a "branch to self" instruction in the right place.
  + One location keeps being read then written, gets hot.
  + Temperature sensor shuts down the computer.

Actually, I don't know if the opcode list was originally from UMich;
the earliest version that I've seen was from there.  Anybody know of
older versions?

	;-D on  ( The processor blushes on instruction decode ) Pardo

			pardo@cs.washington.edu
	{rutgers,cornell,ucsd,ubc-cs,tektronix}!uw-beaver!june!pardo