Path: utzoo!attcan!uunet!husc6!bloom-beacon!apple!voder!pyramid!prls!mips!mash From: mash@mips.COM (John Mashey) Newsgroups: comp.arch Subject: TOCS, articles Message-ID: <2730@winchester.mips.COM> Date: 8 Aug 88 05:41:51 GMT Lines: 19 I've gotten several request on what my comments meant re TOCS. TOCS = ACM Transactions on Computer Systems, specifically 6, 3 (Aug 1988) The specific articles were: Gross, Hennessy, Pryzbylski, Rowen, "Measurement and Evaluation of the MIPS Architecture an Processor" and Colwell, Gehringer, Jensen, "Performance Effects of Architectural Complexity in the Intel 432". Also, to answer another question I've gotten mail on, the MIPS architecture described above is the Stanford MIPS architecture, not the MIPSco R2000. -- -john mashey DISCLAIMER: UUCP: {ames,decwrl,prls,pyramid}!mips!mash OR mash@mips.com DDD: 408-991-0253 or 408-720-1700, x253 USPS: MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086