Path: utzoo!attcan!uunet!portal!cup.portal.com!bcase
From: bcase@cup.portal.com
Newsgroups: comp.arch
Subject: Re: Blitters and design philosophy
Message-ID: <7984@cup.portal.com>
Date: 8 Aug 88 03:02:24 GMT
References: <5254@june.cs.washington.edu> <76700032@p.cs.uiuc.edu> <480@m3.
Organization: The Portal System (TM)
Lines: 14
XPortal-User-Id: 1.1001.5156

|At last something important. The specialized processor (NS8500 RGP) i am
|using costs less than $100. This processor needs a NS8511 BPU for each
|bitplane plus some buffers. Total cost for these chips c:a $300 for an
|8 bitplane system exept memory and video dac's. But okay, when the
|Am29000 is below $100 i might consider. But i still have to do something
|to replace the BPU's so i'm able to process all bitplanes at a time.
|And i hope the code for doing the things the 8500 can, comes with it.

You see, this is exactly the problem with special purpose anythings, CISC
instructions included:  they might not be usable if they don't fit exactly
your situation.  WRT the NS8500 stuff, what if I don't want to use a
planar frame buffer because I *must* be backward compatible with some other
organization?  Of course, if the special-puropse something fits like a glove,
then great!