Newsgroups: comp.sys.m68k
Path: utzoo!henry
From: henry@utzoo.uucp (Henry Spencer)
Subject: Re: quad-aligning the 68020 stack
Message-ID: <1988Aug9.175440.2320@utzoo.uucp>
Organization: U of Toronto Zoology
References: <2194@uhccux.uhcc.hawaii.edu> <4431@cbmvax.UUCP> <2727@winchester.mips.COM> <4434@cbmvax.UUCP>
Date: Tue, 9 Aug 88 17:54:40 GMT

In article <4434@cbmvax.UUCP> ford@kenobi.cts.com (Mike "Ford" Ditto) writes:
>I don't see a real reason for this.  Admittedly, the older 68000 compilers
>that only aligned to 16 bits were a mistake, but that is because the 68000
>has a 32-bit archetecture.  I can't imagine...
>an object-code-compatible chip with a wider-than-32-bits data bus.

Why not?  It wouldn't be as big a win as the jump from 16 to 32, but for
caches in particular, wider is better in memory buses.  I wouldn't be at
all surprised to see the 68050 or whatever with a 64-bit memory bus.
There's no reason why this wouldn't be object-code-compatible; the only
things that really care how wide the memory accesses are, usually, are
the I/O devices, which most code doesn't touch anyway.
-- 
Intel CPUs are not defective,  |     Henry Spencer at U of Toronto Zoology
they just act that way.        | uunet!attcan!utzoo!henry henry@zoo.toronto.edu