Path: utzoo!attcan!uunet!lll-winken!lll-tis!ames!vsi1!daver!mips!mash
From: mash@mips.COM (John Mashey)
Newsgroups: comp.arch
Subject: Re: Software Distribution
Message-ID: <2937@winchester.mips.COM>
Date: 31 Aug 88 04:36:49 GMT
References: <1988Aug23.180420.28483@utzoo.uucp> <958@esunix.UUCP> <1988Aug29.202603.13897@utzoo.uucp> <22778@amdcad.AMD.COM>
Reply-To: mash@winchester.UUCP (John Mashey)
Organization: MIPS Computer Systems, Sunnyvale, CA
Lines: 20

In article <22778@amdcad.AMD.COM> rpw3@amdcad.UUCP (Rob Warnock) writes:
.....
>(Hmmm... how hard is it for each of the current RISC CPUs to emulate each
>of the others?)

The R3000 is pretty easy to convert; actually, we used to
convert it to VAX code all of the time, and we've though about the
conversions to some of the others.  The hardest machines to convert
FROM are those with condition codes (whether in condition code register,
or when computed into another GP register).  They've always been a pain
for emulation, especially if there's any irregularity, and if the
emulating machine doesn't have an almost identical set of conditions.

In fact, just today at lunch, this discussion came up, and I proposed
the R3000 as the obvious architecture to use as the standard binary form
......but there were 2 Sun folks and only one of me, so it got voted down :-)
-- 
-john mashey	DISCLAIMER: <generic disclaimer, I speak for me only, etc>
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