Path: utzoo!utgpu!water!watmath!clyde!att!osu-cis!tut.cis.ohio-state.edu!mailrus!nrl-cmf!ames!ll-xn!husc6!m2c!applix!scott
From: scott@applix.UUCP (Scott Evernden)
Newsgroups: comp.sys.amiga
Subject: Re: Silver (was Re: Amiga 2000 has been swapped)
Message-ID: <786@applix.UUCP>
Date: 25 Aug 88 15:13:40 GMT
References: <2@orbit.UUCP> <6908@well.UUCP>
Reply-To: scott@applix.UUCP (Scott Evernden)
Organization: APPLiX Inc., Westboro MA
Lines: 36

In article <6908@well.UUCP> ewhac@well.UUCP (Leo 'Bols Ewhac' Schwab) writes:
>
>	A VGA bitmap is bigger than 64K.  Intel architectures tend to lose
>real big on data chunks bigger than 64K, so you'll need a very fast CPU to
>bash all the bits at a respectable speed, which won't be cheap.  The '386
>doesn't lose too bad on >64K, but they're not cheap either right now.

Not to be a stickler, but

The standard VGA measures 640 x 480, or less than 40k.  It is true that
there are multiple bit planes, but they all live at the same address.  The
hardware takes care of writing to the planes in parallel under control of
mask, rotate, enable, select, and a assortment of other baroque registers.
To read from an individual plane, you tell a register which one you want and
read.  So, at least for this display mode, you generally don't have to muck
with segment registers too much.

Anyways, the killer with EGAs/VGAs, is that you _have_ to get down and dirty
with the IO registers to accomplish any real work.  This is quite a painful
process on the non-memory-mapped-IO 80x8x's.  You repeatedly play games like: 
mov dx,SEQ_ADDR; mov al,WPL_REG; out dx,al; inc dx; mov al,1; out dx,al). 
Registers are pretty much lost, like DX, for this- on an architecture that is
already register-starved.

Also, these graphic adapters and their IO ports are byte oriented, and since
the intel chips like to load bytes into registers backwards, ops like rotate
(eg., for blitting) have to be done one-byte-at-a-time; 32 bit registers
don't do a thing for you.

Finally, it would seem that hardware capable of multi-plane writes in
parallel would be a win.  This might be true if not for a generally
unpublished feature of these graphic boards which is the number of WAIT
states they require to be accessed.  I understand that some EGA boards
introduce up to 12 wait states if written to.

-scott