Path: utzoo!utgpu!water!watmath!clyde!att!alberta!ubc-cs!uw-beaver!mit-eddie!rutgers!rochester!pt.cs.cmu.edu!spice.cs.cmu.edu!bader From: bader@spice.cs.cmu.edu (Miles Bader) Newsgroups: comp.sys.amiga Subject: Re: new chips questions Message-ID: <2820@pt.cs.cmu.edu> Date: 28 Aug 88 22:35:23 GMT References: <8X635hd38k-041lzFc@andrew.cmu.edu> <11876@oberon.USC.EDU> Sender: netnews@pt.cs.cmu.edu Organization: Carnegie-Mellon University, ITC Lines: 12 In article <11876@oberon.USC.EDU> papa@pollux.usc.edu (Marco Papa) writes: >Yep. The ECS Enhanced Chip Set announced at DevCon in Wash provides a new >non-interlace mode: 640 x 400 (640 x 512 PAL), 4 colors from 64. >To use the ECS you'll need version 1.4 system software and a Bisynch or >Multisynch monitor. But why not 4096? No extra memory bandwidth would be required; the D/A converters, etc, are already being run at the same rate for the existing 640 horiz. modes. I can think of restrictions that might have been required for the new modes, but this certainly isn't one of them... -Miles