Path: utzoo!utgpu!water!watmath!clyde!att!ucbvax!hplabs!pyramid!cbmvax!daveh
From: daveh@cbmvax.UUCP (Dave Haynie)
Newsgroups: comp.sys.amiga
Subject: Re: new chips questions
Message-ID: <4601@cbmvax.UUCP>
Date: 30 Aug 88 20:12:07 GMT
References: <8X635hd38k-041lzFc@andrew.cmu.edu>
Organization: Commodore Technology, West Chester, PA
Lines: 29

in article <8X635hd38k-041lzFc@andrew.cmu.edu>, bader+@andrew.cmu.edu (Miles Bader) says:
> 
> Is it true that in the new graphic chips, the 400-line non-interlaced
> output will only be able to use colors from a total palette of 64?

Yes...

> If so, is there a good reason? 

Yup.  It has to do basically with the way the CLUT is multiplexed in Denise.
While you never probably know this, color registers only run at the 320 dot
pixel rate.  When you shift into hires, the 32 color registers basically get Muxed 
into 16 fast color registers.

The same problem now occurs again in the new Denise, only more so.  We're
now dealing with 35ns pixels instead of the previous 70ns pixels, since 400
line non-interlaced must double the horizontal scan rate.  While you might
think that you could again Mux the 16 registers into 8, the method of
multiplexing on the inputs to the CLUT would work out too slow for the new
mode.  So we're really multiplexing the output of the CLUT, not the input. 
So where there were 12 lines of pixel data emerging from the CLUT, there
are 6 lines in high speed mode.  And 2^6 is obviously 64. 

> -Miles

-- 
Dave Haynie  "The 32 Bit Guy"     Commodore-Amiga  "The Crew That Never Rests"
   {ihnp4|uunet|rutgers}!cbmvax!daveh      PLINK: D-DAVE H     BIX: hazy
		"I can't relax, 'cause I'm a Boinger!"