Path: utzoo!attcan!uunet!cbmvax!daveh
From: daveh@cbmvax.UUCP (Dave Haynie)
Newsgroups: comp.sys.m68k
Subject: Re: quad-aligning the 68020 stack
Message-ID: <4549@cbmvax.UUCP>
Date: 23 Aug 88 17:57:51 GMT
References: <4486@cbmvax.UUCP>
Organization: Commodore Technology, West Chester, PA
Lines: 25

in article <4486@cbmvax.UUCP>, ditto@cbmvax.UUCP (Michael "Ford" Ditto) says:

> That's why I say I can't imagine an object-code-compatible chip with a
> wider-than-32-bits data bus.  You might as well switch to an incompatible
> instruction set and/or entire archetecture so that you could actually
> gain from the wider bus (add 64-bit registers, 64-bit ALU, 64-bit data
> movement instructions, etc. and then there's every reason to switch to
> "The Big Bus").

I wouldn't expect a complete 64 bit bus on a 680x0, at least in the way
you're thinking, and don't really see much need for one.  However, there
is a use for wider buses.  If you extend the internal Harvard architecture
of the 68030 to two external 32 bit buses, one for I, one for D, you could
probably get a real performance improvement.  External caches could funnel
both buses together to form a single 32 bit system bus, much like the 88k
does.  That's certainly not in the works for the 68040, though if Moto
goes on to the 68050 it might make some sense.  By then they should be able
to build some really nice external cache chips.


> 					-=] Ford [=-
-- 
Dave Haynie  "The 32 Bit Guy"     Commodore-Amiga  "The Crew That Never Rests"
   {ihnp4|uunet|rutgers}!cbmvax!daveh      PLINK: D-DAVE H     BIX: hazy
		"I can't relax, 'cause I'm a Boinger!"