Xref: utzoo comp.sys.intel:509 sci.electronics:3707
Newsgroups: comp.sys.intel,sci.electronics
Path: utzoo!henry
From: henry@utzoo.uucp (Henry Spencer)
Subject: Re: 8051 - 8751
Message-ID: <1988Aug28.002342.16425@utzoo.uucp>
Organization: U of Toronto Zoology
References: <1988Aug27.180524.1964@gpu.utcs.toronto.edu>
Date: Sun, 28 Aug 88 00:23:42 GMT

In article <1988Aug27.180524.1964@gpu.utcs.toronto.edu> lharris@gpu.utcs.toronto.edu (Leonard Harris) writes:
>We all know that Intel uses the one time programable part
>when you order masked rom 8051's  - there
>is no way they would make a new die to 
>spec for each oreder.

Au contraire, this is precisely why the large setup charge and minimum order.
They don't redesign the thing, of course, but they do pump your ROM data
into a program that generates a custom mask for one layer [I think it's
only one] of the ROM part of the chip.  That's why it's called "masked ROM".

I'm not sure what the situation is on the Intel side of the fence, but it
is reported that when you buy "ROMless" one-chip micros from Motorola, you
are probably getting masked-ROM parts which turned out to have defects in
the ROM area.

>[Intel says]	The windowless eprom part that is one time
>programable doesn't exist but if it did it would
>be only about $5.00 cheaper than a 8751\ because
>plastic is not much cheaper than ceramic etc. etc..

That may be a bit of an exaggeration, but it is true that on-chip EPROMs
are quite a bit harder to make than on-chip ROMs.  (Witness the way some
companies make "EPROM" versions of their parts that are just ROMless ones
with a piggyback EPROM socket.)
-- 
Intel CPUs are not defective,  |     Henry Spencer at U of Toronto Zoology
they just act that way.        | uunet!attcan!utzoo!henry henry@zoo.toronto.edu