Path: utzoo!attcan!uunet!seismo!sundc!bwong
From: bwong@sundc.UUCP (Brian Wong)
Newsgroups: comp.arch
Subject: Re: Are all RISCs the same?
Message-ID: <5692@sundc.UUCP>
Date: 11 Sep 88 03:56:28 GMT
References: <58@zeno.MN.ORG> <6903@aw.sei.cmu.edu> <22860@amdcad.AMD.COM> <6930@aw.sei.cmu.edu>
Organization: Sun Microsystems, Vienna, VA
Lines: 12


A previous poster voiced his opinion that slow context switch time would
doom any register-window RISC machine.

While I can certainly agree that having a lot of cpu state will certainly
make it much harder to make a good hard real time machine, it is not at all
clear that a "good hard real time machine" will necessarily be what a large
part of the [workstation,minicomputer,pc,minisuper] will want.  

-- 
Brian Wong					Sun Microsystems
bwong@sun.com					Vienna, Va.  703-883-1243