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From: koopman@a.gp.cs.cmu.edu (Philip Koopman)
Newsgroups: comp.arch
Subject: Re: Are all RISCs the same?
Summary: workstations aren't necessarily good for real time control
Message-ID: <2955@pt.cs.cmu.edu>
Date: 12 Sep 88 16:12:03 GMT
References: <58@zeno.MN.ORG> <6903@aw.sei.cmu.edu> <22860@amdcad.AMD.COM> <5116@netnews.upenn.edu>
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In article <5116@netnews.upenn.edu>, blackman@eniac.seas.upenn.edu (David Blackman) writes:
> Real time, predictable performance is one of the most important advantages
> that a workstation affords.  The large variance in response time on normal
> time sharing computers was one of the factors which inspired the development
> of workstations.
......
> The workstation offers the potential of allowing users [NOT "kernel
> hackers"] to write software that requires response time in the range of
> 100 us - 1 ms.  This was impossible with conventional time sharing computers.

I agree that real time control demands predictable performance.  However,
there are different time scales involved here.  For events that don't
require more than a couple of instructions at the 1 ms time-scale, you're
right, workstations and the RISC chips do just fine.

However, for tighter time-tables and more processing, most workstations
aren't quick enough.  Down below a certain threshold, cache misses, pipeline
breaks, etc. can't be averaged out into a "MIPS rating".  If you must
respond to an interrupt with a fairly complex task within 100 us, that
gives you 1000 clocks at 10 MHz.  If you have only 10-20 instructions,
you're all set.  If you have 700-900 instructions to process within
that timeframe, unpredictablility at a fine-grain level
(i.e. cache misses based on what task you were running last, branch
target table hits/misses, etc.) will eat you alive!

A predictable, consistent machine at 10 MIPS may be worth a whole
lot more than a machine that bursts at 40-50 MIPS in a real-time
control environment.  Average performance is a useless figure in this case.
What matters is absolute worst-case performance when meeting deadlines.

  Phil Koopman                koopman@maxwell.ece.cmu.edu   Arpanet
  5551 Beacon St.
  Pittsburgh, PA  15217    
PhD student at CMU and sometime consultant to Harris Semiconductor.