Path: utzoo!attcan!uunet!seismo!sundc!pitstop!sun!amdcad!ames!mailrus!tut.cis.ohio-state.edu!rutgers!bellcore!faline!sword!arrow!yba
From: yba@arrow.bellcore.com (Mark Levine)
Newsgroups: comp.arch
Subject: Re: PDP-11 bus contention
Message-ID: <859@sword.bellcore.com>
Date: 15 Sep 88 21:20:50 GMT
References: <760@ausmelb.oz>
Sender: news@sword.bellcore.com
Reply-To: yba@arrow.UUCP (Mark Levine)
Organization: Bellcore, Red Bank, NJ
Lines: 21

In article <760@ausmelb.oz> ejp@ausmelb.oz (Esmond Pitt) writes:
>Many years ago at a job interview, after I had claimed to know something
>about the PDP-11, I was asked the following question:
>
>	"What special measures are taken in the PDP-11 software _and
>	hardware_ to minimize bus contention?"
>
I suspect you could have just described how the bus worked, mentioned
how an interrupt or a trap was handled in software and what support
there was in the hardware, muttered about hardware priorities, and made
the interviewer happy.  Without a definition for "special measure" this
is a nonsense question.

As I recall, the PDP-11 interrupt strategy and the UNIBUS architecture
were new and wonderful about 15 years ago.  Perhaps that is all the
interviewer was looking for: someone who understood why you needed an
bus grant card in an empty slot.  There were not too many small computers
with vectored interrupts around, nor hardware stack support, and I am not
all that sure that hardware interrupt priorities abounded.  If there is
something "special" in the bus arbitration, I don't know what it really
is.  Was edge-triggered TTL new back then?  DMA throttles?  DMA?