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From: lindsay@k.gp.cs.cmu.edu (Donald Lindsay)
Newsgroups: comp.arch
Subject: Re: non-binary hardware
Summary: yeah, that stuff.
Message-ID: <2997@pt.cs.cmu.edu>
Date: 16 Sep 88 02:20:02 GMT
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In article <655@calvin.EE.CORNELL.EDU> johns@calvin.ee.cornell.edu.UUCP (PUT YOUR NAME HERE) writes:
>Computing gear which had n-stable states, n > 2, would be pretty fascinating
>stuff to play with, and might even have some nice practical applications.
>n-ary systems, with n odd, would be useful for expressing some of the radar
>signals that I deal with in my work.
>I'll believe it when I see it (n-ary logic), however.

There have been conferences on "multiple valued logic" for years.

The dream is (was?) that this could give more functionality per wire.  For
example, a 4-valued logic would allow a 32 bit address to fit on 16 wires
instead of the usual 32 wires. Clearly, we would be looking to build
systems that were denser, more parallel, lower powered, physically smaller,
et cetera.

It is actually fairly easy to build this stuff. However, it doesn't confer
any new computational ability - after all, binary computers can be
persuaded to perform base-10 arithmetic. Also, the circuitry has a cost.

Note that a binary signal which is nominally represented by
	false == 0 volts
	true  == 5 volts
is more truthfully
	false == under X volts
	true  == over X volts
where X is a threshold voltage, somewhere in between 0 and 5. Electrical
problems, such as noise, can cause a "false" to be incorrectly taken as
"true", or vice versa. An N-valued logic has N-1 of these thresholds, and
the N different nominal levels are necessarily nearer together, and
therefore more easily got wrong. The resulting circuit must be run a little
slower, or must use more precise transmitters and receivers, or must use
higher voltages/currents/whathaveyou. This causes costs, which balance
against the wins.

In fact, Intel has used 4-valued ROM cells in several products. Instead of
storing 1 as "transistor", and 0 as "no transistor", the palette was "no
transistor", "small transistor", "medium transistor", and "large
transistor". Unfortunately, the cell size had to be large enough to hold
the large transistor, whereas it would otherwise have only had to be large
enough to hold the small transistor. However, you only needed half the
cells, so the overall ROM came out smaller.

I don't believe that any recent ROMs are built this way. I'm not sure why,
but it might be the chip yield, and it might be the speed of the sense
amplifiers.

-- 
Don		lindsay@k.gp.cs.cmu.edu    CMU Computer Science