Xref: utzoo comp.arch:6323 comp.edu:1363
Path: utzoo!utgpu!water!watmath!clyde!att!osu-cis!tut.cis.ohio-state.edu!ukma!uflorida!beach.cis.ufl.edu!seeger
From: seeger@beach.cis.ufl.edu (F. L. Charles Seeger III)
Newsgroups: comp.arch,comp.edu
Subject: Re: SMD Interface standard
Message-ID: <18159@uflorida.cis.ufl.EDU>
Date: 13 Sep 88 13:07:44 GMT
References: <6290@nsc.nsc.com> <2595@ima.ima.isc.com>
Sender: news@uflorida.cis.ufl.EDU
Reply-To: seeger@beach.cis.ufl.edu (F. L. Charles Seeger III)
Organization: UF EE Dept
Lines: 21

In article <2595@ima.ima.isc.com> johnl@ima.UUCP (John R. Levine) writes:
|In article <6290@nsc.nsc.com> curry@nsc.UUCP (Ray Curry) writes:
|>I was wondering if some sole out there could point me to the keeper of 
|>the SMD drive interface standard.
|
|SMD is ANSI standard X2.91M-1982.  The standard was promulgated fairly
|late in the life of SMD interfaces, so it attempted to codify existing
|practice rather than creating a clean standard, so for example it only
|defines 10 cylinder address lines limiting standard SMD drives to 1K
|cylinders.
|-- 
|John R. Levine, IECC, PO Box 349, Cambridge MA 02238-0349, +1 617 492 3869

Can anyone fill us in on SMD-E, 2.4 and 3.0 MBps interfaces, etc?  Are
there new high performance disk interfaces on the horizon that we should
be aware of?  I've heard of work being done on simultaneous reading from
all (or some subset > 1) of the tracks of a cylinder.  What interface
could handle that much bandwidth?

Thanks in advance,
Chuck  (seeger@beach.cis.ufl.edu)