Path: utzoo!attcan!uunet!super!udel!rochester!pt.cs.cmu.edu!andrew.cmu.edu!bader+
From: bader+@andrew.cmu.edu (Miles Bader)
Newsgroups: comp.sys.amiga
Subject: Re: new chips questions
Message-ID: <8XA1Pey00jaM04eF8b@andrew.cmu.edu>
Date: 15 Sep 88 19:15:54 GMT
References: <2838@pt.cs.cmu.edu>,
	<4627@cbmvax.UUCP>
Organization: Carnegie Mellon
Lines: 11
In-Reply-To: <4627@cbmvax.UUCP>

> *Excerpts from ext.nn.comp.sys.amiga: 1-Sep-88 Re: new chips questions Dave*
> *Haynie@cbmvax.UUCP (3131)*

> In the former case, you're switching from 70ns pixels to 35ns pixels.  The
> Denise color registers only run at 140ns, so they must be quadplexed.
> Normal 640 pixel modes mux the registers before the CLUT; in order to be
> fast enough, noninterlaced hires must do it's second MUX after the CLUT.
> So instead of turning 16 registers into 8, it turns 12 color bits into 6.

Maybe you should have made 24 bit registers, & used the post-clut multiplexing
for every mode.