Path: utzoo!attcan!uunet!seismo!sundc!pitstop!sun!amdcad!ames!pasteur!ucbvax!URIMVS.BITNET!BIW109
From: BIW109@URIMVS.BITNET
Newsgroups: comp.sys.atari.8bit
Subject: 6502 timing question
Message-ID: <8809091641.AA15253@ucbvax.Berkeley.EDU>
Date: 9 Sep 88 16:44:00 GMT
Sender: daemon@ucbvax.BERKELEY.EDU
Organization: The Internet
Lines: 19


  I have a question on the timing of the 6502.  Which requires more
time, an LDA, or an STA?  The reason that I ask is that I am working
on an interfacing project, and am running into problems.  I think that
the problem might be caused by too much delay time in the interface
its self.  The problem is that I am able to read from an external port
(in this case, an A/D converter) with 100% accuracy, but I an unable to
write to another port (a D/A converter made from an 8-bit latch and an
R-2R resistor ladder).  Writes to the D/A converter are sucessful only
about 10% of the time.  The interface circuit introduces the same delay
before activating each port.  I think that I am able to read ok because
on the fact that the cpu allows at least 250ns for the memory (or what
ever is on the bus) to respond.  Can anyone tell me how much time the
cpu allows for memory (or what ever) to latch a byte from the bus?

                          Ray C

biw109@urimvs  <----- 'New and improved' user number!!
                      phr140 will be deleted next week..