Path: utzoo!utgpu!water!watmath!clyde!att!osu-cis!tut.cis.ohio-state.edu!ukma!nrl-cmf!ames!pasteur!ucbvax!URIMVS.BITNET!BIW109
From: BIW109@URIMVS.BITNET
Newsgroups: comp.sys.atari.8bit
Subject: more info on my interfacing problem..
Message-ID: <8809152000.AA28912@ucbvax.Berkeley.EDU>
Date: 15 Sep 88 19:54:00 GMT
Sender: daemon@ucbvax.BERKELEY.EDU
Organization: The Internet
Lines: 34


  The interface connects to the computer through the cart. port.
it uses the 7 low order address lines, and the CCNTL line for control
(addresses $D500 to $D57F are decoded).  I used a design like this
because i want to build an interface into which cards can be plugged
into.  The decoding logic works like this: A0-A3 are fed into one
74154 (4 to 16 line decoder), A4-A6 are fed into another one.  Both
are enabled by the CCNTL (active low) line.  All of the outputs of
the 74154's that are used (all on the first, only the first half on the
2nd - its high order input line is grounded) are inverted to obtain
active high strobes.  The sixteen outputs from the first 74154 are
fed to 8 44-pin female plug in slots.  The 8 outputs from the second
74154 are fed to one slot each (these are used to activate cards in
individual slots.  The read/write line is passed to all slots in both
origional and inverted form.  This was done so that when a particular
address on a card needs to be activated, a 3-input and gate can be used
(active high strobe) or a 3-input nand gate can be used (active low
strobe).  Using this method, a card can be used in any slot, as long
as the program knows which one it is in (the relative addresses within
each slot are the same).
   The data latch in question is a 74374 (i think..  I haven't been
home from school to look at it in the past few weeks), and acts on the
rising edge of the pulse.  The timing problem that I was intested in
is how long is data valid for once it is placed onto the bus?  Since
the latch acts on the rising edge of the strobe, i assumed that the
interface circuit must be taking too long.  Since the 74154 is the most
complicated chip in the interface (if I remember correctly, it has at
least 4 or 5 levels of gates in it) I was thinking of using a high
speed version of the chip, assuming I can find one.
   I hope this is enough info..  And thanks to anyone who can help..

                              Ray C

bitnet:  biw109@urimvs