Path: utzoo!utgpu!water!watmath!clyde!att!whuts!homxb!homxc!rps
From: rps@homxc.UUCP (R.SHARPLES)
Newsgroups: comp.sys.ibm.pc
Subject: Re: 40 MHZ 286?
Summary: Gist of Chang modification
Message-ID: <3333@homxc.UUCP>
Date: 6 Sep 88 21:14:30 GMT
References: <342@intek01.UUCP> <24728@bu-cs.BU.EDU>
Organization: AT&T Bell Laboratories, Holmdel
Lines: 33

In article <24728@bu-cs.BU.EDU>, madd@bu-cs.BU.EDU (Jim Frost) writes:
> In article <342@intek01.UUCP> mark@intek01.UUCP (Mark McWiggins) writes:
> |John Dvorak's "Inside Track" column in the 9/27/88 PC Mag goes on
> |about some "Chang modification" of the 286 motherboard, yielding
> |ridiculous throughput.  Dvorak says he "saw this thing run, I tested
> |it, and it is *incredible* ... sells for $350 to $400 and delivers
> |over 5 [MIPS] performance using ... 200 nanosecond memory and no cache!"
> 
> He's probably completely out in left field.  I've heard rumors of
> high-speed 286 chips (new design and/or new materials give much higher
> speed ratings), so it's possible he's seen such a thing, but without a
> cache I can't imagine how you'd get 5mips with 200ns chips, even
> SRAMS.
> 
> jim frost
> adt!madd@bu-it.bu.edu

The gist of the "Chang modification", as described in Dvorak's article, was
that Chang accumulates machine instructions until he has a whole bunch
and then crams them through the CPU at a 40 Mhz rate.  He then lets the 
chip sit quiet for a while so it doesn't melt down.  The result of this
sprint-rest-sprint-rest-sprint approach, vs the normal jog-jog-jog approach,
is greater throughput.  I don't know if its true, but, for what its worth, 
that is approximately what Dvorak said.

Russ Sharples
homxc!rps

NOTE:

The above in NO WAY reflects the opinions of AT&T.
These opinions are my own and the results of un-scientific and 
highly irregular analysis methods.