Path: utzoo!yunexus!geac!geaclib!daveb
From: daveb@geaclib.UUCP (David Collier-Brown)
Newsgroups: comp.arch
Subject: Re: PEP (really domain architectures)
Message-ID: <3265@geaclib.UUCP>
Date: 2 Oct 88 16:06:50 GMT
Article-I.D.: geaclib.3265
References: <936@raspail.UUCP>
Organization: GEAC Computers, Toronto, CANADA
Lines: 29

In article <2550@sultra.UUCP>, dtynan@sultra.UUCP (Der Tynan) writes:
| Rather than have a standard U/S bit in the CPU status register, it might make
| more sense to assign it to each I-page in a paged-MMU system....

From article <936@raspail.UUCP>, by bga@raspail.UUCP (Bruce Albrecht):
| This scheme has been around for a long time.  One of the first systems that
| I'm aware of that used this was Multics, which has been described in a book
| by Organick (MIT Press, not sure of exact title).  

  Yup,
	Elliot I. Organick, "The Multics System, An Examination of
		Its Structure",  Cambridge, Mass. (MIT Press), 1972

  More recent work has broken this down into "domains of protection"
instead of purely nested rings, and may be found in several forms on
machines ranging from mainframes (Honeywell-Bull, naturely) to
micros (Intel 286/386, of all things!).
  The overhead usually gets quite high, though: if yiu want decent
protection you usually set up another stack, dump all registers,
flush the fpp, etc... Probably not a good idea for a Unix-like
machine, where people are already complaining about the overhead
involved in system calls.

--dave (spread thinly) c-b
-- 
 David Collier-Brown.  | yunexus!lethe!dave
 Interleaf Canada Inc. |
 1550 Enterprise Rd.   | HE's so smart he's dumb.
 Mississauga, Ontario  |       --Joyce C-B