Path: utzoo!utgpu!attcan!uunet!husc6!mailrus!ames!pasteur!ucbvax!amdcad!rpw3
From: rpw3@amdcad.AMD.COM (Rob Warnock)
Newsgroups: comp.arch
Subject: Re: PEP: Page Execution Priviledge
Message-ID: <23125@amdcad.AMD.COM>
Date: 5 Oct 88 02:48:56 GMT
References: <2550@sultra.UUCP> <1988Sep30.170503.19191@utzoo.uucp> <1988Oct1.115519.11020@light.uucp> <1988Oct3.173955.9075@utzoo.uucp> <1988Oct4.100511.16783@light.uucp>
Reply-To: rpw3@amdcad.UUCP (Rob Warnock)
Organization: [Consultant] San Mateo, CA
Lines: 26

Concerning the notion of a privileged jump table:

Note that the DEC KL-10 (a.k.a. "late-model" PDP-10) had just such a
"protected jump" instruction, used for allowing users to attach to and
jump to execute-only segments of proprietary code only at defined places.
There was a particular jump instruction ("JRST") that had an otherwise
unused bit in it. If an attempt was made to jump or call a protected
segment, the access was allowed iff the target of the jump/call was
a "JRST magic_bit, some_address". These instructions were called "portals",
and in fact the assembler opcode "PORTAL" expanded into the "JRST magic_bit,".
Such private segments often had a table of PORTAL instructions at the beginning,
so that calling table+offset was a call to some function.

Unfortunately (if my vague recollection is correct), the magic bit in
question was used for something in kernel mode, so this method was not
useful for changing between user and kernel states, only for unprotected-user
to proprietary-execute-only-user transitions. (*sigh*) 


Rob Warnock
Systems Architecture Consultant

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