Path: utzoo!utgpu!water!watmath!clyde!att!osu-cis!killer!ames!mailrus!uflorida!gatech!hubcap!mark
From: mark@hubcap.UUCP (Mark Smotherman)
Newsgroups: comp.os.misc
Subject: Re: a very naive Question???
Summary: addendum to definitions
Message-ID: <3214@hubcap.UUCP>
Date: 11 Oct 88 20:28:48 GMT
References: <835@amethyst.ma.arizona.edu> <3211@hubcap.UUCP>
Organization: Clemson University, Clemson, SC
Lines: 20


In a previous posting I mentioned that base and limit schemes are viewed
as virtual memory.  I neglected to point out that the single base/limit
pair is the trivial case of segmentation (e.g. GE-635) and that two base/
limit pairs is the n=2 case of segmentation (one segment contains code and
the other segment contains data, e.g. UNIVAC 1108).  The Intel 8086 is an
example of four segments without limit protection.

Note that if there are multiple segments and if a missing segment interrupt
is generated when a non-resident segment is referenced (and if side-effects
on registers can be undone, e.g. autoincrement), then not all of a program
has to be resident in physical memory for execution to proceed.  Thus demand
segmentation is possible.

To say that virtual memory requires demand _paging_, I would have to
reclassify all the segmented machines (also the B5500).  If segmentation
is not a virtual memory technique, then what is it?
-- 
Mark Smotherman, Comp. Sci. Dept., Clemson University, Clemson, SC 29634
INTERNET: mark@hubcap.clemson.edu    UUCP: gatech!hubcap!mark