Path: utzoo!utgpu!water!watmath!isishq!Geoffrey.Welsh From: Geoffrey.Welsh@isishq.FIDONET.ORG (Geoffrey Welsh) Newsgroups: comp.sys.cbm Subject: Re: Questions about 128 Reliability (Considering upgrade from C64) Message-ID: <205.234963B0@isishq.FIDONET.ORG> Date: 29 Sep 88 20:49:50 GMT Organization: International Student Information Service -- Headquarters Lines: 20 > From: rickc@pogo.GPID.TEK.COM (Rick Clements) > Date: 21 Sep 88 05:01:56 GMT > Message-ID: <6008@pogo.GPID.TEK.COM> > There are two CPU's (only one is enabled at a time), and > three ROM sets. While it is correct that only one CPU is operating at any given instant, it should be noted that CP/M I/O is done by the Z80 switching the 8502 in (i.e. I/O code is performed by the 8502 at the Z80's request). Geoff ( watmath!isishq!izot ) -- Geoffrey Welsh - via FidoNet node 1:221/162 UUCP: ...!watmath!isishq!Geoffrey.Welsh Internet: Geoffrey.Welsh@isishq.FIDONET.ORG