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From: jfh@rpp386.Dallas.TX.US (The Beach Bum)
Newsgroups: comp.unix.xenix,comp.unix.questions,comp.unix.microport,comp.sys.ibm.pc
Subject: Re: *nix performance
Message-ID: <7498@rpp386.Dallas.TX.US>
Date: 4 Oct 88 00:25:59 GMT
References: <9902@ico.ISC.COM> <736@starfish.Convergent.COM> <1901@van-bc.UUCP>
Reply-To: jfh@rpp386.Dallas.TX.US (The Beach Bum)
Organization: River Parishes Programming, Dallas TX
Lines: 39

In article <1901@van-bc.UUCP> sl@van-bc.UUCP (pri=-10 Stuart Lynne) writes:
>Not neccesarily. If the DMA channel takes over the bus for the duration of
>the transfer, or if each word transferred takes a a larger number of cycles
>than the CPU would and the system can't interleave processor cycles; then
>CPU is still a win.

To put it very simply, if there are NO free bus cycles, then DMA may be
a loss.  Each DMA cycle is gained at the expense of a CPU cycle.
Presumably in this situtation the CPU is executing fewer cycles doing
useful work than it is accessing the bus - in other words, the system
is bus limited.  [ Consider the case where a CPU requires two cycles to
execute an instruction which required four cycles to fetch. ]

>In both of those situations the CPU can't perform as much work during the
>DMA operation so it *may* be more efficent to allow the CPU to do it.

My guess would be that it is at least no less efficient, modulo interrupt
and context switch overhead.  If the cost of fielding the presumed interrupt
and context switch is significant, then DMA is still a big win.

>Well designed DMA systems get around this by allowing the DMA to operate in
>an interleaved fashion with the CPU. In these systems you can sometimes beat
>DMA with CPU but at the expense of burning CPU cycles and you may wish to
>use DMA simply to allow more processing at the expense of increased data
>transfer time.

Well designed systems dual port their memories and have separate busses
for their I/O subsystem ;-)  Failing that, a dedicated region of I/O
memory which is seldom accessed by the CPU is another win.  Failing THAT
clever alternative, interleaved memory will do in a pinch.  I suppose the
point of all this is that a PC, no matter wether it is a PC, PC/XT, or
even a 386/AT is not designed to handle large does of DMA.

- John.
-- 
John F. Haugh II (jfh@rpp386.Dallas.TX.US)                   HASA, "S" Division

      "Why waste negative entropy on comments, when you could use the same
                   entropy to create bugs instead?" -- Steve Elias