Path: utzoo!utgpu!water!watmath!clyde!att!osu-cis!tut.cis.ohio-state.edu!rutgers!uwvax!umn-d-ub!umn-cs!crayview!imp
From: imp@crayview.msi.umn.edu (Chuck Lukaszewski)
Newsgroups: comp.sys.mac.programmer
Subject: Re: Serial drivers and interrupt trapping
Summary: Issues in trapping serial interrupts
Keywords: Macintosh, Serial, Interrupt, Programming
Message-ID: <7992@umn-cs.CS.UMN.EDU>
Date: 30 Sep 88 01:50:29 GMT
References: <10407@tekecs.TEK.COM>
Sender: news@umn-cs.CS.UMN.EDU
Lines: 47

In article <10407@tekecs.TEK.COM>, jeffsi@tekecs.TEK.COM (Jeff Siegel) writes:
> Help!!  I am trying desperately to write a serial driver which will
> allow me to: (1) trap the interrupt
>              (2) load the data pending
>              (3) do some special processing whenever a specific sized
>                  packet has been completely grabbed

I'm not certain whether you want to replace the SERD driver or just do some
special processing above and beyond it, but here are some things to consider:

The Zilog 8530 is configured entirely from software, and its two ports may be
manipulated basically independently.  I don't think that Apple would be too
upset if you were to trap the level-2 interrupts for a given port, as there is
no real provision anywhere in IM for what you want to do, and the address of
the level-2 interrupt vector is constant in the 680x0 arch..  HOWEVER, I would
STRONGLY caution you to be multifinder friendly as a test of your interface
to the rest of the operating system.  That implies that I ought to
be able to run Red Ryder out the other port while using your program.

To this end, I believe that you could simply vector the level-2 interrupt
to you and then check the IFR register in the 8530 to see if it is for you.
If not, you must jump to the routine that was there before.  In this situation,
it is CRITICAL that you leave the stack alone (i.e. don't do the initial
processing that the level-2 routine does now) and jump to the TOP of the level-2
routine and not to some offset inside of it.  I say this for three reasons:
(1) To minize the rule-bending/breaking affect as little as possible, and
it seems to me that changing the level-2 interrupt address is plenty;
(2) You can't make assumptions about which machine you are running on so you
can't assume the header code in the interrupt handler will be the same and (3)
that code may be totally different anyway as someone else may have already
trapped it.

You can do all of those things that you want by paying attention to appropriate
registers and enables in the 8530.

As far as machine compatibility goes, be SURE to use the global SCCBase rather
than hardcoding addresses.  (I know, I know - globals are off-limits but there
is no OS routine to give that value).  This is especially true if you are
running on the Lisa.  BTW, if you want to run on the Lisa, note that the 8530
interrupts are level 6 (!!) rather than level 2.  The 8530 is mapped into mem-
ory just as on the Macintosh Plus/SE/II, however, so SCCBase will work properly.
There is also a baud rate compensation you must do because of a 2% difference
in speeds between the machines.  Write to me if you need more information.

---===---===---===---===--/* Chuck Lukaszewski */--===---===---===---===---
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