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From: jfh@rpp386.Dallas.TX.US (The Beach Bum)
Newsgroups: comp.unix.wizards
Subject: Re: Data in text segment
Message-ID: <7599@rpp386.Dallas.TX.US>
Date: 6 Oct 88 03:34:24 GMT
References: <159@taux02.UUCP> <7124@rpp386.Dallas.TX.US> <10420@tekecs.TEK.COM>
Reply-To: jfh@rpp386.Dallas.TX.US (The Beach Bum)
Organization: River Parishes Programming, Dallas TX
Lines: 53

In article <10420@tekecs.TEK.COM> andrew@frip.gwd.tek.com (Andrew Klossner) writes:
>		"... separate I/D pdp11 cannot support text-segment
>		shared data."
>
>	"most modern CPU's can support separate I&D space in some sense
>	by way of protection bits, blah blah blah ..."
>
>The point missed by the second poster is that "separate I&D space" is
>usually taken to mean two separate but overlapping address spaces.

Incorrect.  This poster did take that fact into account.  The more
reasonable CPU's have status lines from the CPU which indicate the
nature of the instruction.

For example, the MC68000 supports separate I&D space at the hardware
level by careful use of the FC0, FC1, and FC2 lines.  The truth table
is

	FC2	FC1	FC0	Access Mode
	0	0	1	User Data
	0	1	0	User Program
	1	0	1	Supervisor Data
	1	1	0	Supervisor Program

Thus, the MC68000 can be said to support PDP-11-style separate I&D.

>If this were comp.unix.questions, I would say, "If you have never
>thought about this concept, take a few moments and so so.  A light of
>interesting lights will dawn."  But of course we're all wizards here ...

If this were comp.arch, I would say, go grab a few hardware manuals.
Unfortunately the rest of mine are at the office.  Or packed away in
boxes laying on the floor in the closet. ;-)

It would appear that the 8088/6 supports separate I&D by virtue of
being able to decipher if a reference is in the code segment or not.
I suspect the rest of that family has a similiar concept present in
silicon.

Another quick look into the Zilog Z8000 family indicates the information
is present on the ST 0 .. 3 lines.

So it would appear that "overlapping" separate I&D, which is the only
kind I ever thought existed, is the norm for modern CPU's.  Lacking
the desire to flip through my 80386 manual, I suspect that ALL leading
CPU's have some means of deciphering code segment from data segment
references.  And this capability is sufficient to support PDP-11
style separate I&D.
-- 
John F. Haugh II (jfh@rpp386.Dallas.TX.US)                   HASA, "S" Division

      "Why waste negative entropy on comments, when you could use the same
                   entropy to create bugs instead?" -- Steve Elias