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From: guy@auspex.UUCP (Guy Harris)
Newsgroups: comp.arch,alt.next
Subject: Re: RISC v. CISC (really comments on many postings: LONG)
Message-ID: <312@auspex.UUCP>
Date: 27 Oct 88 16:38:45 GMT
References: <156@gloom.UUCP> <6865@winchester.mips.COM> <2005@ficc.uu.net>
Reply-To: guy@auspex.UUCP (Guy Harris)
Organization: Auspex Systems, Santa Clara
Lines: 35

>> [7]  This is very confusing.  Most RISCs use 3-address operations, i.e.,
>> 	reg3 = reg1 OP reg2.
>> 			rather than just 2-address ops:
>> 	reg1 = reg1 OP reg2

>I've been out of things for a while, but didn't RISCs use to use either
>stack or load-store architecture? Or was that just RISC-1?

They still do.  Note that the 2-address and 3-address operations he
lists all have "regN" as the operands; RISCs tend to use load-store
operations as their only *memory-reference* operations, but (unless you
have magic "memory" locations that do arithmetic) you generally need
arithmetic operations as well to make a useful computer.  RISCs tend to
have only register-to-register arithmetic operations, and they tend to
be 3-"address" in the sense that they operate on two registers and stick
the result in a third, with none of them obliged to be the same register.

>Anyway, I brought up two CISCy features I'd read about here recently. That
>was one. Addressing modes are the other.
>
>And addressing modes... even just indexing and autoincrement... are pretty
>CISCy.

Umm, if indexing is "pretty CISCy", then just about every machine out
there is a CISC, which makes "CISCy" pretty much uninteresting as an
adjective, unless you can show an interesting machine that lacks
indexing.

"Indexing" generally refers to forming an effective address by adding
the values in one or more registers to a constant offset, and both the
MIPS Rn000 (OK, John, what's the term you use to refer to the R2000 and
R3000, or are they different enough that such a term wouldn't be
useful?) and SPARC, to name just two machines generally thought of as
RISCs, both support indexing in that sense (register+offset on MIPS,
register+register+offset on SPARC).