Xref: utzoo comp.arch:6707 alt.next:201 Path: utzoo!hoptoad!amdcad!crackle!tim From: tim@crackle.amd.com (Tim Olson) Newsgroups: comp.arch,alt.next Subject: Re: "CISC MIPS" ... was "The NeXT Problem" Message-ID: <23309@amdcad.AMD.COM> Date: 20 Oct 88 01:37:25 GMT References: <26435@ucbvax.BERKELEY.EDU> <5498@juniper.uucp> <6119@quacky.mips.COM> Sender: news@amdcad.AMD.COM Reply-To: tim@crackle.amd.com (Tim Olson) Organization: Advanced Micro Devices, Inc. Sunnyvale CA Lines: 15 Summary: Expires: Sender: Followup-To: In article <6119@quacky.mips.COM> dennis@admin.UUCP (Dennis Franklin) writes: | In article <5498@juniper.uucp> chari@juniper.UUCP (Christopher Michael Whatley) writes: | >... Doesn't 20 RISC MIPS equal about 5 CISC MIPS? | > | The "MIPS" figure that is published by RISC chip/computer manufacturers | IS what you term "CISC MIPS". It is usually stated as "VAX MIPS". I.e., | 1 VAX 11/750 = 1 MIP. ^^^^^^ Should be 11/780, unless you want your VUPS scaled by 0.6! ;-) -- Tim Olson Advanced Micro Devices (tim@crackle.amd.com)