Path: utzoo!attcan!uunet!ncrlnk!ncrcae!ece-csc!mcnc!rutgers!mit-eddie!bbn!rochester!pt.cs.cmu.edu!sei!sei.cmu.edu!firth From: firth@sei.cmu.edu (Robert Firth) Newsgroups: comp.arch Subject: Re: The NeXT Problem Message-ID: <7399@aw.sei.cmu.edu> Date: 19 Oct 88 12:04:15 GMT References: <26435@ucbvax.BERKELEY.EDU> <5498@juniper.uucp> <250@dataspan.UUCP> Sender: netnews@sei.cmu.edu Reply-To: firth@bd.sei.cmu.edu (Robert Firth) Organization: Carnegie-Mellon University, SEI, Pgh, Pa Lines: 19 In article <250@dataspan.UUCP> deraadt@dataspan.UUCP (Theo De Raadt) writes: >I puke trying to write assembly on RISC machines... I'd be interested to know whether that's a generally held view. In the course of porting a compiler and runtime to the MIPSCo M/500 RISC machine, I wrote a fair amount of assembler, and found it both easy and pleasant. Far less bothersome that, say, Vax or MC68020 assembler. Even the second pass reorganising the code was straightforward (this is adviseable since the assembler's own reorganiser is not always very astute). The most pleasant part was that I didn't have to keep computing instruction and address mode timings ("now, is it faster to do a clear or a move of zero? should I scale the index myself or use the scaled-index mode? do I buy anything making this address a CSE?" And so on)