Path: utzoo!attcan!uunet!husc6!rutgers!apple!baum
From: baum@Apple.COM (Allen J. Baum)
Newsgroups: comp.arch
Subject: Intel announces new RISC system (10/17)
Message-ID: <18975@apple.Apple.COM>
Date: 18 Oct 88 18:30:10 GMT
Reply-To: baum@apple.UUCP (Allen Baum)
Organization: Apple Computer, Inc.
Lines: 13

[]

Intel (BiiN actually, the joint venture with Siemens) has just
announced  their newest version of the 80960 architecture. It is a
tagged architecture, (33-bit words). There is a 4 chip set: CPU, BXU
(Bus interface), CP (channel processor) and MCU (Memory interface).
The object oriented system allows processors to be added at will. There
are 3 levels if fault tolerance, including the basic level of having a checker
processor in parallel with the main processor. The system can address 2^26
objects of 2^32 bytes. 5.5Mips/CPU. $45,000 for the basic box (2 CPUs). Full
UNIX, Ada. Dynamically reconfigurable HW/SW. Everything the 432 should have
been.  (This gleaned from EE Times 10/17)

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