Path: utzoo!utgpu!attcan!lsuc!ecicrl!clewis From: clewis@ecicrl.UUCP (Chris Lewis) Newsgroups: comp.arch Subject: Re: ETA-10: CMOS or ECL? Message-ID: <126@ecicrl.UUCP> Date: 22 Oct 88 19:25:42 GMT References: <3539@phri.UUCP> Reply-To: clewis@ecicrl.UUCP (Chris Lewis) Organization: Elegant Communications Inc. (CRL Division) Lines: 74 In article <3539@phri.UUCP> roy@phri.UUCP (Roy Smith) writes: > > I was at JVNC yesterday gaping through the plate-glass windows at >the ETA-10 ... > > At one point I said something like "The CPU is all ECL, right?", >and he said, "No, it's CMOS". This really surprised me. Is it really >CMOS? I always thought of CMOS as pretty slow stuff, just pushing the >speed of normal TTL, and certainly not supercomputer stuff. Modern high-speed CMOS IC's are actually outstripping much of TTL. For example, I believe that the 74HC series is approximately the same speed as 74AS (advanced schottky). Coupled with the fact that it is possible to create considerably denser CMOS than TTL you no longer have as much capacitance to charge - capacitance is one of the determining factors in CMOS speed. CMOS has come a long way from the old RCA CD4000 series parts... To answer someone else's question which is connected: In article <558@quintus.UUCP> Jabir Hussain (jabir@quintus.uucp) writes: > could anyone tell me what ASIC stands for? thanks ASIC stands for "Application Specific Integrated Circuit". Various IC manufacturers have developed a process by which a customer designs what he wants his ICs to do, and the IC manufacturer programs their machinery and makes it. Effectively, an ASIC part is a medium to large gate array, where the final connections between each of the elements can be easily rearranged as the last step in fabrication. The customer is often given some CAD software that knows the geometry and capacity of an unprogrammed ASIC part, the customer builds his circuitry using CAD and a library of "macros" which describe basic building blocks. A tape of the result is sent to the foundry to be used in constructing a mask for the final etching phase. The chip is then encapsulated and tested and shipped to the customer. Usually costs something like $30K to $100K to run through one iteration of CAD -> finished part. [Not to mention running the CAD (though many manufacturers rent out time on their own systems) and engineering costs] Thus, you gotta be real careful that you get it right the first time. Many manufacturers also supply simulators so you can test the heck out of it before committing to silicon. Think of it as an mask-ROM, where instead of programming ones and zeros, you're programming connections between gates. Now, some of the modern ASIC is pretty spectacular. I believe that the ETA-10 is built with a 6000-gate ASIC part, with gate delays on the order of .2 to .5 nS. Resulting in what a CDC person described as "effectively a Cyber 205 on a board". Something like 15ns cycle time for the whole machine, as opposed to something around 7 for the 205. Motorola has an 10K gate ASIC family (though, this is ECL I think) which has gate delays of 60-100 pS! The libraries are also pretty spectacular - some libraries come complete with entire CPU's as basic building blocks. You want multiple CPUs on a single chip? Easy! Many PC/AT/386 clones rely upon these parts for reducing their parts count: eg: Chips and Technology as well as Zymos market chip sets (4-7 components) that replace most of the 100 or so MSI parts required on a motherboard. Zymos actually built a single ASIC part that replaced *everything* on an AT motherboard except for the CPU chip. The only reason you don't see such things around now, is that they figgered they'd need something like 300 pins, and the yield would be lousy. So it never went in production. Many of the new display adapters on PCs consist of a single ASIC part. If I'm not mistaken, IBM pioneered a lot of this technology in building their big iron, and other manufacturers (eg: machine manufacturers like CDC, or chip companies like TI, Motorola) have followed suit or independently developed their own ASIC fabrication and design process. There are now companies exclusively doing ASIC or ASIC tools (C&T, Zymos, CDC has a subsidiary doing it, LSI etc). -- Chris Lewis Ferret Mailing list:{uunet!attcan,yunexus,utzoo}!lsuc!gate!eci386!ferret-request {uunet!mnetor,yunexus,utzoo}!lsuc!ecicrl!clewis (or lsuc!gate!eci386!clewis or lsuc!clewis)