Path: utzoo!yunexus!geac!syntron!jtsv16!uunet!portal!cup.portal.com!chrisj
From: chrisj@cup.portal.com (Christopher T Jewell)
Newsgroups: comp.arch
Subject: Re: RISC v. CISC (was The NeXT problem
Message-ID: <10478@cup.portal.com>
Date: 25 Oct 88 08:40:15 GMT
Article-I.D.: cup.10478
References: <10193@cup.portal.com> <5863@killer.DALLAS.TX.US>
Organization: The Portal System (TM)
Lines: 22

In <14112@mimsy.UUCP>, chris@mimsy.UUCP (Chris Torek) writes

>In article <5863@killer.DALLAS.TX.US> elg@killer.DALLAS.TX.US (Eric Green)
>writes:
>>For example, the high-end Vaxen have a pipelined MICROARCHITECTURE. It
>>is almost impossible to effectively pipeline the macroarchitecture of
>>a Vax, because of the multitude of instruction set formats (almost as
>>bad as the 680x0). 
>
>While the 680x0 have a number of formats (and thus lengths), one of the
>nice properties of its instruction set is that the first word tells you
>the length of the entire instruction.

Only if x <= 1.  On the '020 and '030, an indexed addressing mode
(specified by the opcode word) can require from 1 to 5 extension words
(specified by the first extension word for that operand).  An instruction
whose opcode word specifies `MOVE (ix,An),(ix,An)' can be from 6 to 22
bytes long.

Christopher T Jewell   chrisj@cup.portal.com   sun!cup.portal.com!chrisj
"Sure I'm an egomaniac---like everyone else, I'm the only god there is."
				Spinrad, _Riding_the_Torch_