Newsgroups: comp.sys.next
Path: utzoo!henry
From: henry@utzoo.uucp (Henry Spencer)
Subject: Re: NeXT Memory - No Error Checking or Parity !
Message-ID: <1988Oct28.210152.29417@utzoo.uucp>
Organization: U of Toronto Zoology
References: <549@gt-eedsp.UUCP>
Date: Fri, 28 Oct 88 21:01:52 GMT

In article <549@gt-eedsp.UUCP> jensen@gt-eedsp.UUCP (P. Allen Jensen) writes:
>The reason was that "memory is reliable enough that the added cost
>was not justified."  If you have ever worked on some older equipment
>without parity, your opinion may differ.  Could an expert on RAM
>chips respond ?   Is memory really "reliable enough" ?

I'm not really an expert on RAM chips, but I do know that the reliability
of modern RAMs is *spectacularly* better than the ones that were routinely
in use 5-10 years ago.  Parity and error correction were fully justified
on the 4Kb and 16Kb chips; the 64Kbs were vastly better, the 256Kbs better
yet, and I imagine the 1Mbs are probably a further improvement.  We're
talking orders-of-magnitude improvement here.  My feeling is that parity
is nice but no longer a necessity.
-- 
The dream *IS* alive...         |    Henry Spencer at U of Toronto Zoology
but not at NASA.                |uunet!attcan!utzoo!henry henry@zoo.toronto.edu