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From: peter@ficc.uu.net (Peter da Silva)
Newsgroups: comp.arch,alt.next
Subject: Re: RISC v. CISC (really comments on many postings: LONG)
Message-ID: <2042@ficc.uu.net>
Date: 28 Oct 88 15:15:15 GMT
References: <156@gloom.UUCP> <6865@winchester.mips.COM> <2005@ficc.uu.net> <312@auspex.UUCP>
Organization: SCADA
Lines: 26

In article <312@auspex.UUCP>, guy@auspex.UUCP (Guy Harris) writes:
> Umm, if indexing is "pretty CISCy", then just about every machine out
> there is a CISC, which makes "CISCy" pretty much uninteresting as an
> adjective, unless you can show an interesting machine that lacks
> indexing.

Well, blithely stepping over the autoincrement question, what about the
Cosmac 1802? The first CMOS microprocessor, the first micro with an orthogonal
instruction set, the first micro with a real-time operating system. It
had all sorts of RISCy features, such as a load-store architecture, gobs
of registers, and orthogonal instructions. The PC was just a general register,
pointed to by the 4-bit P register, so was the SP, so for a microcontroller
application you could do a context switch in two instructions:

	SEX	n
	SEP	n

It was widely used in embedded controller applications where low power was
important well into the early '80s. If Cosmac has been able to support and
expand it it'd be a decent contender to the intel chips today. It's a much
saner design than the 8080, and its sucessors wouldn't have been the
monstrosities that the 8080 has visited upon us.
-- 
Peter da Silva  `-_-'  Ferranti International Controls Corporation
"Have you hugged  U  your wolf today?"     uunet.uu.net!ficc!peter
Disclaimer: My typos are my own damn business.   peter@ficc.uu.net