Path: utzoo!yunexus!geac!syntron!jtsv16!uunet!pdn!alan
From: alan@pdn.UUCP (Alan Lovejoy)
Newsgroups: comp.arch
Subject: Re: RISC v. CISC (was The NeXT problem)
Message-ID: <4759@pdn.UUCP>
Date: 29 Oct 88 00:50:31 GMT
Article-I.D.: pdn.4759
References: <156@gloom.UUCP< <28200218@urbsdc>
Reply-To: alan@pdn.UUCP (0000-Alan Lovejoy)
Organization: Paradyne Corporation, Largo, Florida
Lines: 29

In article <28200218@urbsdc< aglew@urbsdc.Urbana.Gould.COM writes:
<>As an aside, the 68030 can do a 32 bit multiply in about (If I remember 
<>correctly -- I don't have the book in front of me) 40 cycles.  A while
<>back, I tried to write a 32 bit multiply macro that would take less 
<>than the 40 or so that the '030 took.  I didn't even come close (even 
<>assuming lots of registers and a 32 bit word size (which the 6502 
<>doesn't have)).  
<
<There do exist RISCs with multiply instructions. In fact, real 
<multiplies, with full multiplier arrays taking lots of space that
<might otherwise have had to be used for microcode.
<
<>Cory Kempf
<
<Andy Glew

The 88k does a 32-bit integer multiply in 4 cycles (r3000 takes 13
cycles, I believe).  A 32-bit integer divide takes the 88k 39 cycles
(r3000 takes 36 cycles, I believe).  Of course, if either of the
division operands is negative (signed division opcode), the 88k has to
trap to a software routine to finish the division.  In other words,
not all RISCs are wimps just because they don't have "complex
instructions". 

-- 
Alan Lovejoy; alan@pdn; 813-530-8241; Paradyne Corporation: Largo, Florida.
Disclaimer: Do not confuse my views with the official views of Paradyne
            Corporation (regardless of how confusing those views may be).
Motto: Never put off to run-time what you can do at compile-time!