Path: utzoo!utgpu!water!watmath!clyde!bellcore!rutgers!rochester!pt.cs.cmu.edu!andrew.cmu.edu!jk3k+
From: jk3k+@andrew.cmu.edu (Joe Keane)
Newsgroups: comp.arch
Subject: RT linkage convention
Message-ID: <YXOskwy00Xo440jlI0@andrew.cmu.edu>
Date: 30 Oct 88 21:40:12 GMT
Organization: Carnegie Mellon
Lines: 7

I understand how the RT linkage convention works, but not why it's the way it
is.  My question is, why does the _caller_ put in r0 the address of the callee's
data area?  I can think of two unlikely reasons: so the balix delay slot is
always full; or so two functions can share an entry point (which function was
called determined by r0).  Reply by mail and i'll summarize.

--Joe