Path: utzoo!attcan!uunet!seismo!sundc!pitstop!sun!chiba!khb
From: khb%chiba@Sun.COM (Keith Bierman - Sun Tactical Engineering)
Newsgroups: comp.arch
Subject: Re: A simple question on RISC
Message-ID: <75577@sun.uucp>
Date: 1 Nov 88 05:50:43 GMT
References: <6544@xanth.cs.odu.edu>
Sender: news@sun.uucp
Reply-To: khb@sun.UUCP (Keith Bierman - Sun Tactical Engineering)
Organization: Sun Microsystems, Mountain View
Lines: 54

In article <6544@xanth.cs.odu.edu> aiko@cs.odu.edu (John K Hayes) writes:
>
>
>
>Can someone explain, in general, what RISC technology is?  Starting, perhaps,
>with what RISC stands for.  I'm not exactly an architecture person.
>
>I shall appreciate it-----------john
>-- 
RISC == reduced instruction 

The IBM 360 was the first really popular microcoded machine. This
allowed a very large number of instructions to be supported (i.e.
different assembley language op codes). Thus was born CISC (complex
instruction set computers). The rationale was if its hard to do in
software (or is slow) let's put it in the hardware. Especially when
people compared the relative costs of hardware and software. And so
everyone was happy. 

After a few years, some bright people noticed what Seymour Cray never
forgot, hardwired logic was faster. Also that maybe not all those
nifty wizbang instructions ever got used. Or if they got used, it was
so rare that it didn't matter. Or they got used, and it was slower
than some combination of simple instructions. Or all of the above.

Thus was born RISC. If we ignore Seymour (always a mistake), the early
RISC prople were IBM, UCB and Stanford. With the exception of Seymour,
all of these early RISC machines were too simple.

Now we have the Clipper, the MIPS chip, SPARC, and the AMD29K, the
Moto 88K, and dozens of experiental chips.

The basic design philosophy is : pick what you think real problems
are. Measure how it behaves. Design your RISC. Simulate it. Recurse
until you feel good. Make it. Market it. Get rich (one hopes :>). The
point being don't just put stuff in the chip, decide what you want,
and make sure it does it.

In a very real way, RISC places a big burden on compilers (to get good
performance). On the other hand, since RISC's tend to be simple,
optimizers don't flail around as much (on a VAX, say, when do you use
the compute polynomial instruction, when is it better to have
something in a register or memory ? what about saving registers, do it
"by hand" or use the push all instruction ? RISC machines typically
only have one way to do anything. Thus the compiler writer can
concentrate on other questions (like how to keep the pipe always full)).

Thus (IMHO) RISC is a design methodogy.

Of course, I don't speak for Sun. Furthermore Sun desgined SPARC
without any help from me.

Keith H. Bierman
It's Not My Fault ---- I Voted for Bill & Opus